Questions d'entretiens - Analog design engineer


Questions d'entretien pour Analog Design Engineer partagées par les candidats

Principales questions d'entretien

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On a demandé à Analog & Mixed-Signal IC Design Engineer...26 juin 2012

How to make sure the 2-stage opamp is stable? How does the compensation work?

5 réponses

Using Miller compensation. A compensation capacitor across the 2nd stage to create pole splitting. A series resistor to the cap might be needed to solve the rhp zero problem Moins

Using compensation capacitor, which makes the low frequency pole's frequency become lower and high frequency pole's frequency higher, so OPmap is more stable. Moins

Using compensation network including capacitor and resistor and monitoring the phase margin and gain margin as well. Moins

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You have to design an LDO with an output voltage of 2V and a supply of 3.6. What is the problem and how do you solve it?

3 réponses

The question was not about efficiency, since the answer was about voltage rating of devices. It was for experienced designer. Moins

Were this questions for a graduate vacancy? or experienced Analog designer (2-3 years) Moins

From the formulation of the question it was clear that there was a voltage stress on the device, but I needed informations on the technology to answer that (maximum voltage rating, ..). I didn't obtain any detail. I could not think of any solution to the problem (I was assuming CMOS technology), when he told me: you use a DMOS as a pass-device. Well, he did not even say that the technology was BCD.. Moins

How to convert from high impedance to low impedance?

2 réponses

Using a buffer

use voltage feedback

Texas Instruments

Sketch the voltage across a capacitor when charged by a constant current source

2 réponses

I answered the question along with the diagram and explained in detail

v(t)=integral i(t) if the current source is constant then the voltage will increase linearly. Moins

Texas Instruments

What is an op amp

2 réponses

An opamp is a voltage controlled voltage amplifier

The Ampersand?


why is matching required?

2 réponses

Maximum power transfer.

Matching in MOSFET transistor inverters is necessary because the electrons that move in the NMOS transistor move at a faster rate than the holes that move in the PMOS transistor. This means when a signal is received, the NMOS will react before the PMOS. To equalize this, they transistors must be matched (by adjusting their widths) so that their transition times are the same. Moins


What are the advantages of cascode current mirror? What is the equation of Ro? Noise, Miller effect, frequency compensation... What is the difference between Flip-flop and Latch?

Silicon Labs

What input capacitance do I see when driving a common source amplifier?

2 réponses

Cin = Cgs + Cgd (1 + gm/gds) (Miller effect on cgd)

For CS amplifier, CIN= CGS+CGD.

Intel Corporation

What happens when vdd and gnd of an inverter are swapped?

1 réponses

Acts as a buffer

Signalchip Innovations

The interview was a very good coverage from analog to digital with signal and systems. The topics where well spread and yet deep.

1 réponses

I was able to cover most of the questions, due to i guess my deep liking to the subject. Moins

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