Questions d'entretiens - Senior circuit design engineer

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Questions d'entretien pour Senior Circuit Design Engineer partagées par les candidats

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Synopsys
On a demandé à A&Amp; MS Circuit Design Engineer Senior I...11 février 2021

1. Digital custom design - setup/hold constraints, clock skews, crosstalks, layout related clock routing queries, wire delay.

Synopsys

2. Analog design - Transmitter design for serdes, pam4, design considerations, circuit information, plls, string arm latch design, amp design, noise in cmos circuits, aging, emir, reliability, modelling, lab debug.

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