Le processus a pris 1 jour. J'ai passé un entretien chez AMD (Austin, TX) en oct. 2007
Entretien
Hiring process not very complicated. Submitted resume to a Fellow at AMD who passed it along to the appropriate hiring manager. Background fit so I got a call and scheduled an interview.
The interview was long and VERY technical. I believe there 7 or 8 1 on 1 interviews, beginning with the hiring manager who just went over the basics and asked if I had questions. Then the fun began. One after another, 7 more people, all technical, interviewed me. The questions were basic, but you had to know your undergrad engineering quite well.
Some questions as I remember them:
1) Basics of inverter in/out curves
2) Logical reduction
3) Device stacking (pros/cons, tapering, total width)
4) device physics (nmos cross section, channel, saturation, DIBL)
Questions d'entretien [1]
Question 1
In saturation, the channel region pinches off well before the drain. How does current get from the source to drain then? (Since the channel is pinched off, it does not touch the drain)
J'ai postulé en ligne. J'ai passé un entretien chez AMD (Bengaluru) en août 2021
Entretien
Four rounds, very smooth yet challenging. Overall satisfactory. Last round was managers interview. He was friendly and asked me some basic questions reg my past projects. Answered most of the technical questions asked. You need to know the concepts very well to make the most suitable impression.
Questions d'entretien [1]
Question 1
What are the different pipelining stages and related
J'ai postulé en ligne. Le processus a pris 1 semaine. J'ai passé un entretien chez AMD (Austin, TX) en juin 2021
Entretien
There were 2 rounds of technical interview of 4 members panel lasting an hour and half each time. First round was mainly focused on coverage related questions. Second round was focused on UVM related questions. Followed by a HR interview.
Questions d'entretien [1]
Question 1
UVM methodology related question about 1. Virtual interface 2. Fork join 3. UVM create and resource_db() usage. Some questions on Code coverage closure. I was asked to write c/sv code for cdc fifo and build a verification environment around it and simulate fifo full and fifo empty conditions
J'ai postulé via la recommandation d'un employé. Le processus a pris 2 jours. J'ai passé un entretien chez AMD (Bengaluru) en juil. 2017
Entretien
I had 5 rounds of interview. It was very good interview & in the process they have covered all the areas in which the employee would work.. Clear indication on the role
Questions d'entretien [1]
Question 1
Problem Solving
Domain related questions
IQ questions, They prepared scenarios to write logic to solve problems
