J'ai postulé en ligne. Le processus a pris 3 semaines. J'ai passé un entretien chez AMD en mars 2013
Entretien
I got an email for a quick phone call. I then had 5 one-hour Skype sessions with 5 different people, with 15 minute breaks between each person. Each person had different areas of expertise and were all on the team that I was interviewing for. I got questions ranging from work habits to technical questions. I didn't have any written questions because this was a video call, so all of my answers were verbal answers.
Questions d'entretien [1]
Question 1
What is one of the most challenging problems you came across and how did you debug it?
J'ai postulé en ligne. Le processus a pris 2 semaines. J'ai passé un entretien chez AMD (Londres, Angleterre) en janv. 2026
Entretien
1. HR call - slary expectation, relocation, general q/a
2. CV based interview with hiring manager (focusing on past relative work experinence)
3. 4 Tech interviews (problem solving, algorithms, job specific tech skills)
Questions d'entretien [1]
Question 1
propose a design of the module based on provided specifications
It was smooth, i had three rounds with first being the screening. It was for internship so they mostly focused on intermediate level C++ programming for performance architecture role. It was a video interview via teams.
Telephone and video call,
Basics to projects
Resume based
Power sta front end
Back end
Synthesis
Vlsi
What are the challenge you will see in lower technology?
What are the inputs and outputs from the power analysis?
What are the checks after power planning is completed?
What are the power dissipation components? How to reduce them
Why float outputs are ignored but not float gates?
How do you calculate the core ring width?
What is IR drop? And how will you decrease this?
Questions d'entretien [1]
Question 1
What are the challenge you will see in lower technology?
What are the inputs and outputs from the power analysis?
What are the checks after power planning is completed?
What are the power dissipation components? How to reduce them
Why float outputs are ignored but not float gates?
How do you calculate the core ring width?
What is IR drop? And how will you decrease this?