Questions d'entretien Mixed Signal IC Design Engineer chez Vicor Corp.

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Vicor Corp.

Entretiens

Entretien pour Mixed Signal IC Design Engineer

8 nov. 2020

Candidat à l'entretien anonyme

Aucune offre

Expérience neutre

Entretien facile

Candidature

J'ai postulé via un recruteur. J'ai passé un entretien chez Vicor Corp. (Lincoln, RI) en oct. 2020

Entretien

~ 1hr phone interview, conversational style then on site 3 hour interview, mixture technical questions and conversation. Most enjoyable interview I ever had. They did not make it "high pressure" .

Questions d'entretien [22]

Question 1

construct a 3 input NAND from two input NAND gates

1 réponse

Question 2

define logic gates to generate A>B, A = B, A<B A, B are simple 1, 0 inputs.

1 réponse

Question 3

draw a basic mos opamp

1 réponse

Question 4

explain compensation of basic op amp

1 réponse

Question 5

start with an SR flip flop, then turn it into a D flip flop by

1 réponse

Question 6

draw a transistor level schematic of an analog switch

1 réponse

Question 7

Where is the largest resistance of the analog switch

1 réponse

Question 8

In the mos Opamp, how could you increase voltage gain at constant current consumption

1 réponse

Question 9

How would you increase gain in an amplifier circuit?

1 réponse

Question 10

Explain latchup in an MOS process

1 réponse

Question 11

how would you supress latch up in the NP N P structure?

1 réponse

Question 12

apply de Morgan's theorem to a gate circuit

1 réponse

Question 13

for the MOS opamp, what happens if W is too large

1 réponse

Question 14

draw a bandgap circuit and explain it

1 réponse

Question 15

make an AND gate from two Nmos

1 réponse

Question 16

Draw the layout of the AND gate

1 réponse

Question 17

Draw and SAR ADC block diagram

1 réponse

Question 18

Given an analog integrator, what is the time domain response for a pulse Vin

1 réponse

Question 19

Given and RC high pass filter, what is the response for a step input.

1 réponse

Question 20

Given RC low pass filter, what is the response to a step?

1 réponse

Question 21

draw an instrumentation amp input stage

1 réponse

Question 22

draw a schematic of an MOS inverter write the VO/Vin from small signal equations

1 réponse

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Entretiens chez Vicor Corp.Entretiens d’embauche pour Mixed Signal IC Design Engineer chez Vicor Corp.Entretien chez Vicor Corp.

Entretien pour Mixed Signal IC Design Engineer

8 nov. 2020

Candidat à l'entretien anonyme

Aucune offre

Expérience neutre

Entretien facile

Candidature

J'ai postulé via un recruteur. J'ai passé un entretien chez Vicor Corp. (Lincoln, RI) en oct. 2020

Entretien

~ 1hr phone interview, conversational style then on site 3 hour interview, mixture technical questions and conversation. Most enjoyable interview I ever had. They did not make it "high pressure" .

Questions d'entretien [22]

Question 1

construct a 3 input NAND from two input NAND gates

1 réponse

Question 2

define logic gates to generate A>B, A = B, A<B A, B are simple 1, 0 inputs.

1 réponse

Question 3

draw a basic mos opamp

1 réponse

Question 4

explain compensation of basic op amp

1 réponse

Question 5

start with an SR flip flop, then turn it into a D flip flop by

1 réponse

Question 6

draw a transistor level schematic of an analog switch

1 réponse

Question 7

Where is the largest resistance of the analog switch

1 réponse

Question 8

In the mos Opamp, how could you increase voltage gain at constant current consumption

1 réponse

Question 9

How would you increase gain in an amplifier circuit?

1 réponse

Question 10

Explain latchup in an MOS process

1 réponse

Question 11

how would you supress latch up in the NP N P structure?

1 réponse

Question 12

apply de Morgan's theorem to a gate circuit

1 réponse

Question 13

for the MOS opamp, what happens if W is too large

1 réponse

Question 14

draw a bandgap circuit and explain it

1 réponse

Question 15

make an AND gate from two Nmos

1 réponse

Question 16

Draw the layout of the AND gate

1 réponse

Question 17

Draw and SAR ADC block diagram

1 réponse

Question 18

Given an analog integrator, what is the time domain response for a pulse Vin

1 réponse

Question 19

Given and RC high pass filter, what is the response for a step input.

1 réponse

Question 20

Given RC low pass filter, what is the response to a step?

1 réponse

Question 21

draw an instrumentation amp input stage

1 réponse

Question 22

draw a schematic of an MOS inverter write the VO/Vin from small signal equations

1 réponse

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