1.brief self introduction 2.Ask basic digital design questions like setup/hold time, cdc, FIFO, some FSM design frequency divider and low power method 3.disign flow 4.have you drown layout before? 5.
Questions d'entretien [1]
Question 1
setup/hold time, cdc, FIFO, some FSM design frequency divider and low power method
I applied though campus placement. The first step was a written test. It was a virtual interview in Microsoft teams. there were 2 members in the interview panel. Over all the process went smoothly.
Questions d'entretien [1]
Question 1
some of the questions are:
1) cache
2) micro processor and micro controller
3) program to compare strings
4) questions on almost everything in resume
J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 4 jours. J'ai passé un entretien chez Qualcomm (Warangal) en août 2023
Entretien
The interview was around 30min Interviewer was friendly and the questions were mostly related to digital design, VLSI, Verilog and Static Timing Analysis. He didn't asked much about my projects just asked about difficulties that I faced while doing project.
Questions d'entretien [1]
Question 1
Can you design a AND gate using full adder and following that can you say full adder is a universal gate
