J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 2 semaines. J'ai passé un entretien chez Qualcomm (San Diego, CA) en mars 2020
Entretien
Average interview with questions from System Verilog and UVM. Was tested on the Design logics like flip flops, MUX, implementation of gates using MUX. A couple of behavioral questions were also asked
Questions d'entretien [1]
Question 1
Assertions, Coverage, Testplan, Phases in UVM, Constraints, and Randomization
three rounds of interview
1. dsa two qns from hacker rank (1 easy and 1 medium) and projects
2. dsa 1 qn (medium) and a api read and manipulate qns from hacker rank
i got rejected in 2nd round
J'ai postulé via la recommandation d'un employé. J'ai passé un entretien chez Qualcomm (Cork)
Entretien
HR & Technical, pretty standard. There was a few coding questions, and the interviewer was helpful and they were trying to help clarify the questions. HR was helpful and made a lot of customizations for me
ScreenTest
3 Technical Rounds
OS, DP, LinkedList, Bit Manipulation and string coding questions.
Semaphores, mutexes, OSI layers etc.
Applied via LinkedIN.
Went through past interview questions.
Bit Manipulation and memory management is important.
Questions d'entretien [1]
Question 1
ScreenTest
3 Technical Rounds
OS, DP, LinkedList, Bit Manipulation and string coding questions.
Semaphores, mutexes, OSI layers etc.
