Company:

Qualcomm France S.A.R.L.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm France-QITC mission is to develop and deploy highly configurable custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC integration teams can quickly assemble SoCs with the desired Power Performance Area (PPA) characteristics. To this end, QITC technology embraces the complete SoC infrastructure to provide increased SoC performance at minimal cost for integration. Our work is at the backbone of the SoC, interconnecting all major IP solutions.

Qualcomm Interconnect Technology (QITC) has been breaking ground in interconnect design for 15 years and continues to innovate and deliver technology in line with the very latest evolutions in SoC design.

You will join a team at the boundary of software and hardware engineering. The team delivers CAD tools which allow the designer to describe interconnects as high-level abstraction features. The tools choose, configure and connect the appropriate unit part of the library of HW IP developed at QITC. The software also allows from a properly configured design to export all sorts of collaterals, for integration in Qualcomm IP delivery flow for SoC building. This includes: Verilog descriptions, SystemC models, excel sheets, pre-configured verification environments, etc.

We are looking for a software engineer to reinforce our team. You will work closely with hardware designers and work on the tools that they use to create the latest SoC technologies.

Responsibilities:

This is a software engineering position. General responsibilities include:

• Gathering feedback and designing new features to enhance the possibilities of the tools.

• Participating to releases planning and deliveries. We’re delivering often with strong expectations on delivery quality.

• Monitoring code quality and regression status.

Specific technical responsibilities include but are not limited to:

• IP integration and configuration. For example: a cache coherent network.

• Netlist analysis and transformation. Graph and path finding algorithms.

• Generating info for and streamlining physical design flow.

• GUI for topology or floorplan edition.

The working environment is: Linux, Git, Qt, Python OOP, C++

Minimum Qualifications * Master’s degree in Science, Engineering, or related field. Position opened to beginner or experienced engineers

Preferred Qualifications

• Team player

• Fluent in software design best practices.

• Good knowledge in object-oriented programming.

• Good python skills.

• A strong interest in hardware technologies. (block diagrams, RTL Verilog, VHDL, SystemC, Arduino or electronics)

What's on Offer

• Friendly and collaborative working environment

• Salary, stock and performance related bonus

• Maternity/Paternity Leave

• Employee stock purchase scheme

• Matching pension scheme

• Education Assistance

• Life, Medical, Income and Travel Insurance

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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